Semiconductor Physics: Bands, Doping, and the p-n Junction

The Band Gap Separates Worlds

In 1947, John Bardeen, Walter Brattain, and William Shockley demonstrated the first working transistor at Bell Laboratories — a device that amplified and switched electrical signals using the quantum mechanical properties of germanium. Within a decade, the semiconductor industry emerged from this demonstration; within six decades, it produced integrated circuits containing 50 billion transistors on chips smaller than a fingernail. The entire edifice of modern computing, communications, and renewable energy rests on a single physical concept: the band gap — the energy range in which no electron states exist in a crystalline solid, separating its valence band from its conduction band.

Conductors, Semiconductors, and Insulators

In conductors, the valence and conduction bands overlap — electrons can freely acquire energy and move. In insulators, the band gap is so large that thermal energy at room temperature (k_B T ≈ 0.026 eV) cannot promote electrons across it. Semiconductors have band gaps in the range where temperature, light, and deliberate impurities (doping) can dramatically change conductivity — the key to their utility.

Intrinsic Semiconductors: Thermally Generated Carriers

In a pure (intrinsic) semiconductor at absolute zero, all valence band states are filled and the conduction band is empty — the material is an insulator. At room temperature, thermal energy promotes some electrons across the band gap into the conduction band, leaving behind positive vacancies in the valence band called holes. Both electrons (conduction band) and holes (valence band) contribute to current flow — holes move as electrons fall into them from neighboring positions, creating an effective positive charge carrier.

The intrinsic carrier concentration ni depends exponentially on temperature and band gap: ni ∝ T^(3/2) × exp(−Eg/2kT). For silicon at 300 K: ni ≈ 1.5 × 10^10 cm−3 — compared to silicon's atomic density of ~5 × 10^22 cm−3, only about one in 10^12 atoms contributes a carrier. This makes intrinsic silicon a poor conductor. Doping is what makes it useful.

Doping: n-Type and p-Type

Doping introduces controlled impurities that create additional charge carriers without requiring thermal promotion across the full band gap.

• n-type doping: Replace silicon atoms (4 valence electrons) with phosphorus atoms (5 valence electrons). The extra electron is only loosely bound (donor energy level ~0.05 eV below conduction band) and is thermally ionized at room temperature, donating a free electron to the conduction band. n-type: electrons are majority carriers; holes are minority carriers.
• p-type doping: Replace silicon atoms with boron atoms (3 valence electrons). Boron accepts an electron from the valence band (acceptor level ~0.05 eV above valence band), creating a hole. p-type: holes are majority carriers; electrons are minority carriers.

Doping levels of 10^15–10^20 atoms/cm^3 (compared to silicon's ~5 × 10^22 cm^3) increase carrier concentration by 5–10 orders of magnitude over intrinsic silicon. The Fermi level — the energy level at which the probability of electron occupation is 50% — shifts toward the conduction band in n-type material and toward the valence band in p-type material.

The p-n Junction and Depletion Region

When p-type and n-type semiconductors are placed in contact (the p-n junction), electrons diffuse from the n-side toward the p-side (where electron concentration is lower) and holes diffuse in the opposite direction. This diffusion leaves behind fixed ionized donor atoms (positive) on the n-side and fixed ionized acceptor atoms (negative) on the p-side — creating a depletion region depleted of mobile carriers, with a built-in electric field (typically 0.5–0.7 V for silicon) that opposes further diffusion. Equilibrium is reached when drift current (driven by the field) balances diffusion current.

The built-in potential is the rectification mechanism:

• Forward bias: Apply positive voltage to p-side. Reduces the built-in potential barrier, allowing majority carriers to flow across the junction. Current increases exponentially: I = I0(e^(V/nVT) − 1). The diode conducts.
• Reverse bias: Apply positive voltage to n-side. Increases the barrier. Only tiny reverse saturation current (I0) flows from minority carriers. The diode blocks. Current stays near zero.

This asymmetric I-V characteristic — the diode equation — is the foundational rectifying function that enables AC-to-DC conversion, signal detection, and logical switching.

Light-Emitting Diodes and Solar Cells

Electron-hole recombination across a p-n junction can release energy as light (electroluminescence) or absorb light to generate current (photovoltaic effect):

• LED: In forward bias, electrons and holes are injected into the junction, where they recombine. In direct bandgap semiconductors (GaAs, GaN, InGaN), recombination preferentially releases a photon with energy ≈ Eg. The emitted wavelength λ = hc/Eg. GaN (Eg = 3.4 eV): blue/UV LEDs — the 2014 Nobel Physics Prize for Akasaki, Amano, and Nakamura. InGaN alloys tune Eg to produce green, blue, and white LEDs.
• Solar cell: Photons with energy ≥ Eg are absorbed, promoting electrons to the conduction band. The built-in field of the p-n junction separates electron-hole pairs before recombination, driving electrons toward the n-contact and holes toward the p-contact — producing photocurrent. Silicon solar cells have optimal Eg = 1.12 eV, well-matched to the solar spectrum (peak at ~1.8 eV visible).

Bipolar and Field-Effect Transistors

The transistor is the fundamental building block of all digital electronics. Two major architectures dominate:

CMOS (Complementary MOS) logic uses pairs of n-channel and p-channel MOSFETs — current flows only during switching transitions, not in stable states. This near-zero static power dissipation enables the integration of billions of transistors without catastrophic heat generation. CMOS dominates all modern microprocessors, memory, and digital logic.

Moore's Law and Miniaturization Limits

Gordon Moore observed in 1965 that the number of transistors on an integrated circuit had doubled approximately every year (later revised to ~2 years). This empirical trend — Moore's Law — held for approximately 50 years, driving the exponential improvement of computing performance. The 2024 leading-edge process nodes (Intel 18A, TSMC 2nm-class) place gates at approximately 2–3 nm feature sizes — just 10–15 silicon atoms across.

Physical limits are now measurable and urgent. Below ~2 nm gate lengths, quantum tunneling allows electrons to penetrate gate oxide barriers that should block them, producing off-state leakage current and power dissipation. New transistor architectures — FinFETs, gate-all-around (GAA) nanosheet transistors, 3D stacking — extend scaling beyond traditional planar limits. But the fundamental constraint — the Bohr radius of a silicon hydrogen donor is ~2 nm — means classical semiconductor physics eventually runs out of room. The next computing paradigm may require quantum computing, neuromorphic architectures, or new material systems entirely.